Silicon Low Noise Amplifier

2 GHz low-noise amplifier designed using SOI technology for minimal noise figure and low-power operation

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LNA Layout

About

Designed a 2 GHz low-noise amplifier optimized for minimal noise figure and low-power using SOI technology. The project involved comprehensive circuit simulation and electromagnetic performance analysis using Cadence tools. Developed a complete integrated circuit layout that integrates both passive and active components on silicon substrate.

Technical Specifications

Frequency

2 GHz

Technology

Silicon-On-Insulator (SOI)

Design Tools

Cadence Virtuoso

Simulation

Circuit and electromagnetic analysis

Layout

Full IC layout with passive and active components

Features

  • Optimized for minimal noise figure
  • Low-power operation design
  • Complete integrated circuit layout
  • Electromagnetic simulation and analysis
  • Silicon-on-insulator technology implementation